The Case of the Befuddling Base Clock
One frosty eve in the Winter of the foremost annul of the millennium’s second decade, a weeping, westerly sun lay low its rueful rays and retreated beneath a cumulus curtain, one that cloaked the Earth’s stage and solemnly marked a chip-set’s final hour in office. Over one thousand days of legendary service in stoic honour of gruelling gaming, onerous over clocking , fathomless folding, remorseless rendering, preposterous priming and murderous mining….have I used any of those before? I am of coarse waxing lyrical over the virtues of the x58. Pin for Pin and cap for cap, Master Intel’s most versatile, least volatile and luxury laden answer to an enthusiast’s uncompromising aspirations.
When married to its accompanying processors, the Nehalem derived “Bloomfield” and later, the “Westmere based “Gulftown”, this noble flagship ferried a small fraternity of allegedly favourable innovations.
First and foremost, a relocated memory controller, dragged from its classy North Bridge abode and dropped into small apartment under the processor’s heat spreader.
Next up. The Uncore. Not a tangible feature, but the expression used somewhat ambiguously, to collectively define components critical to the CPU’s functionality but not resident on its core(s). Precisely what the term accounted for varied from one platform to the next and occasionally encompassed elements of the motherboard. Inevitably, it depended on the views of experts who sought pleasure through perpetual disagreement and obfuscation. Thankfully, I’m no such expert, but for the purposes of this article, feel free to consider the Level 3 cache and memory controller as two primary examples of what the Uncore represented.
Third in line was the QPI, or Quick path Interconnect. A bountifully broad bi-directional data conveyor, effortlessly encapsulating and efficiently transporting the system’s cumulative binary payload from the processor’s cores to the IOH, formerly the North Bridge, and returning it in a more timely fashion than a cheetah’s application for a job at an institute for suicidal antelopes.
Each of the above was attributed to an independent multiplier which, for the Uncore, had to be at least double or one and a half times that of the memory, depending on whether a Bloomfield or Gulftown CPU was installed, while all three were inextricably bound to a fourth and definitive catalyst, the beguilingly “flexible” base clock.
This proverbial “magic bullet” was the divisor, factor or increment which ultimately dictated the frequency of the CPU, QPI, Uncore and RAM by virtue of their respective multipliers. The value was decreed by Intel and resided at 133mhz in the case of every Nehalem and Westmere variant.
With the aim to better comprehend this steady accumulation of digits and descriptors, here is a delicate dusting of appropriate visual assistance.
As you can observe, the multipliers equate to ratios which can be interpreted in the same fashion as basic betting odds. The lower figure denotes the better’s stake and the higher, the bookmaker’s return in the event of a triumph. To apply the analogy, think of the processor’s “stake” as whatever its base clock divisor is, in this instance, 133mhz. Then times that figure by the value of its multiplier to get the CPU’s “winning” frequency!
The same logic can be employed to ascertain the speeds of the QPI, Uncore and Memory since all are comprised of the base clock’s numerical building blocks.
In regard to these arbitrarily animated aids, which hopefully will emanate quaint and enlightening quirkiness amidst a storm of supercilious synonyms, the frequency ranges quoted for the processor and memory are based on the advertised specifications of all compatible parts. They do not account for the additional performance one might achieve by skilfully exploiting several billion BIOS specifics. Consolidating this data would be impossible since every motherboard embodies different options for fine adjustments, which generate uniquely contrasting increases in speed.
For processors, the values relate to the slowest chip in a non-turbo state, to the fastest with turbo enabled. In this case, the applicable CPUs are the Bloomfield i7 920 and i7 Gulftown 990 Extreme Edition respectively. Regarding RAM, the figures listed coincide with the vendor’s certifications for kits with the lowest and highest bandwidth. Though never much in demand, introductory DDR3 modules commenced at frequencies of 800mhz with supercharged sticks stretching to 3000mhz once fabrication techniques had reached their zenith.
Here are some important equations to commit to your cortex before we proceed.
Memory Multiplier = Right side of ratio (DRAM:FSB) as listed in under the memory tab of CPU-Z.
Memory Ratio = The above figure divided by 2.
Memory Frequency = Base Clock x Memory Multiplier
QPI Frequency = Base Clock x QPI Ratio/Multiplier
Uncore Frequency = Base Clock x Uncore Multiplier
DDR SDRAM = Double Data Rate Synchronous Dynamic Random Access Memory, with a clear emphasis on double.
The RAM frequency CPU-Z displays amounts to half of its actual value, while the identified memory ratio is double what it should be. Put simply, the first figure accounts for the memory’s disposition to duplicate, while the second does not? Why? Because its so delightfully confusing. Just bare in mind, when incorporating the memory’s ratio to calculate its speed, you’ll need to double up to get an accurate result!
Alternatively, to avoid your lobes spontaneously liquidizing and elude a succession of superfluous clicks, you could defiantly discount the ratio and work solely off the readings that CPU-Z delivers, praying that purists don’t descend upon for you doing things the easy way.
Our Story Moves On
As speculation concerning the potential of what had promised to be a momentous architectural transition gathered steam, thoughts amongst the tuner’s elite were initially mixed. The long standing Front Side Bus had proven a pivotal variable on which all hampered by fixed multipliers relied, and its removal apparently relegated the motherboard’s role in scaling mount megahertz to one of meagre significance.
For those who were looking to preclude profligacy but procure perks by avoiding Intel’s extortionate extremists, this was declared an imminent disaster. Oh! Horror. Frequency would be founded on fabrication alone, an arbitrary asset determined by acquiring a processor whose cores were its maternal wafer’s crisp and crunchy prime cuts, or charred and chewy cold cuts.
Obsessive over-clocking omnipotence was over. The motherboard was but a shell shorn of all senses, a silicone slave, perpetually perturbed by her pilot’s proclivities. The Bloomfield’s burdensome base clock would sneakily scupper any sizeable speed bonus while the diminished on-die memory controller and QPI were rumoured to harbour multipliers locked tighter than Bluebeard’s briefcase. Worse yet, what would become of RAM when compromised by its crippled custodian, whose competence to safely supply sustenance subsided at 1.65 volts? Oh! Havoc! Venture above this, and your ship would flounder in flames, before sinking below bilious blue smoke. By the damnation of SIMMS, were the days of deluxe DIMMS also dwindling to a close?
Thankfully, the universes’s greatest healer was at hand. Time. Soon, such portentous prophecies would be exposed as pre-emptive paranoia originating from adopters who might well have camped beside factory lines. The immobilized QPI and memory multiplier were inhibitions subsequently associated with non-retail CPUs, otherwise known as “engineering samples”.
The merciless martinet Intel and his ceaselessly shrewd opportunism, had already spawned a second welcome remedy for the DDR dilemma in the shape of XMP (extreme memory profile). This was a convenience identical in concept and function to SPD (serial presence detect), collaboratively developed by Intel and “accredited” memory vendors. It allowed for a modules’ most important settings pertaining to timing, frequency and voltage to to be stored in a small chip on the stick (the EEProm) then activated in the host motherboard’s BIOS via a single keystroke, and with the manufacturer’s formal approval.
Packages typically presented a pair of intuitive “profiles” influenced by probable real world scenarios, some with taut, “aggressive” timings and command rates at the price of frequency and others with loose “relaxed” timings and higher frequencies to maximize bandwidth. Now is not the moment to discuss or debate the merits of either so I shall suitably simplify “tight and low” for game nation “loose and high” for creation. Bah! Unfit to trammel a hip-hoppers trouser sag. To further placate the panic, memory vendors themselves were in radical form and, like Japanese motor machinists extracting voluminous velocity from humble handfuls of horse power, utilized 1.65 volts to work modular miracles.
Masterful motherboard innovators imbued with instincts to circumnavigate and conquer coded rebellious BIOSES replete with screen after screen of scalable voltages, memory timing and latency tweaks.